SAN JOSE, Calif., Dec. 19, 2024 /PRNewswire/ -- S2C, a global leader in FPGA-based prototyping solutions, announces its Prodigy S8-100 Logic System, the latest addition to the eighth-generation family, is shipping and deployed by leading enterprises. Designed to address the growing demands of AI and HPC, the S8-100 series delivers unparalleled scalability, flexibility, and efficiency.
Powered by AMD Versal™ Premium VP1902 adaptive SoC with 100M ASIC gate capacity, the S8-100 delivers 2x logic resources and 2.5x the I/O bandwidth when compared with its predecessor S7-19P. Available in Single, Dual, and Quad FPGA configurations, the S8-100 supports medium-scale to hyperscale designs with ease, making it a versatile choice for advanced chip development.
Highlights:
Rich Resources: The S8-100 delivers remarkable resources, featuring 18,507K system logic cells, 858Mb of internal memory, 6,864 DSP slices, dual-core Arm Cortex A72 and dual-core Arm Cortex R5 in each FPGA module.
High-Speed & Flexible I/O Architecture: Equipped with 2,212 XPIOs supporting dynamic I/O voltages (1.0V–1.5V) and GTM/GTYP transceivers with PCIe Gen5 and data rates of up to 56Gbps, the S8-100 effortlessly meets a wide range of system requirements.
Scaling and Partitioning Made Easy: PlayerPro-CT partitioning software supports TDM-driven, multi-strategy scheduling and placements. Fully automated flow takes RTL to bitstream with simple clicks, significantly boosting productivity.
High Productivity Toolchain: Add-on tools, including PlayerPro-DT for multi-FPGA debugging, ProtoBridge for co-simulation, and an extensive library of Prototype Ready IP of pre-validated daughter cards, speed adapters, memory interface models and reference designs, accelerate deployment and shorten the development cycle.
The S8-100 Logic System, with a capacity of 100M ASIC gates per FPGA, doubles the resources of its predecessor, the S7-19P, and offers a 2.5x increase in I/O bandwidth. Featuring high I/O counts and 32/56Gbps transceivers supporting protocols such as PCIe Gen5 and QSFP-DD, it combines robust performance with flexible scalability, meeting the demands of complex logic designs.
In particular, advanced RISC-V cores can comfortably fit inside a single S8-100 system without the need to partition. A three to five times boost in performance can be expected. For hyperscale AI and HPC designs, the S8-100 reduces partitioning complexity, simplifies topology, and facilitates seamless optimization.
To accelerate deployment, S2C offers a library of ready-to-use daughter cards, memory adapters, speed adapters, and reference designs. These tools streamline the setup of validation environments and simplify system integration. Frequently adopted options include high-speed PCIe Gen5, 400G Ethernet, and LPDDR/DDR5, and common SoC interfaces such as QSPI, MIPI D-PHY, and JTAG/debug, matching the needs across diverse applications.
Combining the S8-100 with fully automated timing-driven partitioning software enables one-click flow from RTL to bitstream, simplifying the steps of large design partitioning. S2C's robust toolchain, including real-time control (Player Pro-RunTime), multi-debugging (Player Pro-DebugTime) and co-simulation (ProtoBridge), significantly boosts productivity, making it an essential tool for complex chip design.
"The era of AI has begun, and chip design is getting ever more difficult to keep up." said Ying J Chen, VP of marketing. "Prodigy S8-100 with expanded capacity and superior performance is here to provide a robust verification solution for innovation in AI and HPC.
Availability
The Prodigy S8-100 Series (Single/Dual/Quad) is shipping now. For more information, please contact your local S2C representative or visit www.s2cinc.com.
source: S2C
【etnet 30周年】多重慶祝活動一浪接一浪，好禮連環賞！ ► 即睇詳情
